Custom builds, better performance, lower costs — it’s easy to understand the hype of chiplets in the Internet of Things (IoT). These modular chip components, originally developed for high-performance computing, are now making significant inroads into the world of connected and embedded devices, offering a novel approach to building system-on-chips (SoCs).
Chiplets enable an ecosystem of reusable and customizable components that address various challenges in performance, efficiency, power consumption, size and cost. The result is impressive, promising to lower chip production costs by more than 40% and unlock specific chips for specific purposes.
As the IoT industry evolves to meet the demands of emerging technologies, chiplets present both exciting possibilities and potential challenges. Let’s explore the promises and perils of chiplets in IoT, examining how they might shape the future of connected devices and the considerations for successful integration.
From ASICs to chiplets — the evolution of chip design
To fully appreciate the impact of chiplets, it’s crucial to understand their place in the evolution of chip design. In the early days of computing, when microcontrollers were too slow for specialized tasks like video encoding or network packet processing, developers turned to Application-Specific Integrated Circuits (ASICs). These custom-built chips offered high performance for specific purposes but came with considerable costs and lengthy development times.
Chiplets represent the latest evolution in this journey. If ASICs are like building with very small atoms, chiplets are more like building with Lego blocks. By breaking down a large, monolithic chip into smaller, reusable components, chiplets enable a new level of customization and flexibility. This approach allows chip designers to leverage the best of different technologies and domains — such as logic, memory, analog, RF and photonics — to create high-performance and power-efficient electronics.
As a result, designers can now select, assemble and optimize chiplets to create highly customizable SoCs that meet specific design objectives and constraints. This not only speeds up the design process but also allows for more efficient use of advanced manufacturing processes, as each chiplet can be produced using the most appropriate and cost-effective technology node.
The promise of chiplets — customization, efficiency, innovation
There’s a lot to like here. Manufacturers can now create tailored chip solutions for diverse device needs at a fraction of the cost. The result is faster time-to-market for specialized devices and cost-effective customization for niche applications.
The efficiency gains of chiplets are particularly crucial for IoT applications. By facilitating the creation of purpose-built devices, chiplets significantly improve power efficiency and overall system performance. This leads to extended battery life in wireless sensors and enables more sophisticated on-device analytics without constant cloud connectivity.
Additionally, chiplets encourage innovation by bringing AI and edge computing capabilities to smaller, more efficient devices, while also offering significant latency reduction crucial for real-time IoT applications. This combination enables faster edge processing and optimized communication, dramatically improving responsiveness in critical systems like smart video surveillance.
The peril of chiplets — challenges in IoT adoption
While chiplets offer exciting possibilities, their adoption in IoT isn’t without hurdles. Testing complexity stands out as a significant challenge. Chiplet-based systems require extensive evaluation of each component and its interconnects, potentially increasing testing time and costs. This complexity could lead to unforeseen interactions in real-world conditions, thereby requiring new testing methods and equipment.
Integration poses another formidable challenge. Despite the promise of modularity, combining multiple chiplets into a cohesive system is no simple task. Engineers must ensure seamless communication between chiplets from different manufacturers, manage thermal issues in densely-packed designs and strike a balance between modularity benefits and integration overhead.
The lack of industry-wide standards presents a third major obstacle. For chiplets to realize their full potential in IoT, common interfaces and protocols for communication are crucial. Ensuring interoperability between chiplets from various suppliers and establishing quality benchmarks are necessary steps. Without these standards, the vision of mix-and-match modularity may remain elusive.
Integrating Innovation with an eye on the risks
There’s no doubt chiplets offer a compelling blend of customization, efficiency and innovation. But — and it’s a big but — notable challenges remain in testing, integration and standardization.
Encouragingly, to this last point, progress is being made on the standardization front. The Universal Chiplet Interconnect Express (UCIe), an open standard for die-to-die interconnects, is being co-developed by industry giants like AMD, Intel, Google Cloud and TSMC. This development is crucial for ensuring compatibility between chiplets from different vendors, because if you have Lego blocks without a common connecter, what’s the point? UCIe could significantly increase the likelihood of widespread chiplet adoption.
With careful navigation of its promises and perils, including leveraging emerging standards like UCIe, device designers and developers should approach this evolution optimistically. They could reap significant performance rewards through strategic implementation, ushering in a new wave of sophisticated, efficient and tailored IoT solutions.
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