Arm ups performance and efficiency in new designs to compete with AMD and Intel
Fabless semiconductor maker Arm Ltd. has announced new chip designs that will power the next generation of cloud computing, 5G and High-Performance Computing (HPC) hardware coming next year, to compete with products from Arm rivals Intel and AMD. Arm’s new designs include the Neoverse V2 platform, code-named “Demeter,” Neoverse E2, and next-generation N-series cores. The new cores will guide product development for Arm and its silicon partners through this next generation, which Arm’s partners will put into production in their chip designs beginning in 2023.
Arm’s centerpiece of the new announcements is the second-generation Neoverse V2 core. We’ve already seen a preview of tech based on that design: Nvidia Corp. showed it off earlier this year when it debuted its Grace datacenter CPU. Grace delivers 2x performance per watt over servers powered by “traditional” architectures, said Arm. Arm says that Neoverse V2’s core design is intended to push cloud workload performance without requiring more power or a larger chip surface area. Besides Nvidia, Arm said that several of its partners have designs in the work based on Neoverse V2.
This marks the V-series core’s transition from the Arm 8.4 instruction set architecture to v9, the company noted. As such, it incorporates the security enhancements Arm made in v9 as well; those include Arm’s Confidential Compute Architecture (CCA), which shields code and data from unauthorized access and changes. The new chipset also uses CMN-700, a scalable mesh interconnection designed to speed data transfers between memory buses and compute, acceleration and I/O functions.
Neoverse V2 has been optimized to handle the scale of increasingly complicated cloud workloads, said Arm. Neoverse V2 sports dramatically improved integer performance, scalability and efficiency. It also has heftier L2 caching, which Arm said will help it process bigger data sets. Performance tuned to provide better vector and machine language processing, as well.
E2 sports efficiency for the edge, 5G and IoT
Arm’s designs are increasingly finding their way into the 5G ecosystem, from the data center to the edge, and straight into the user handset. While the Neoverse V2 is Arm’s new data center powerhouse, its maximum performance envelope isn’t suited for low-power and high-efficiency needs.
At the other end of the spectrum is the E-Series, which Arm created to maximize throughput efficiency. Neoverse E2 sports the same CMN-700 mesh interconnection and system backplane as its beefier sibling, mated to Arm’s Cortex A510 CPU design. The A510 is a first-generation Arm9 design, which the company updated this year with a 35% performance uplift and a 5% power reduction compared to Arm’s previous-generation high-efficiency CPU. Neoverse E2 sports support for Compute Express Link (CXL 2.0), an open standard for high-speed CPU interconnection aimed at HPC and data center use, based on the PCI Express (PCIe) interface.
“This allows the best of cloud technology in constrained applications: a scalable range of core counts, SystemReady compatibility, and PCIe, CXL, IO and interfaces,” said Arm SVP and GM Chris Bergey.
“In the 5G RAN and wireless infrastructure, Arm is providing leading performance at reduced power, greater throughput, which results in critical TCO benefits. This enables our partners to customize products for applications and use cases ranging from small cells, macro cells, to private networks. Through the Arm 5G Solutions Lab, we’re working with leaders in the 5G ecosystem like Dish Wireless, Google Cloud, Marvell, NXP, and Vodafone to accelerate end-to-end 5G networks on Arm,” said Bergey.
