Imagination Technologies has made good on its promise to wrestle with ARM, launching a 32-bit low-power CPU core based on the MIPS architecture. The Warrior P-class P5600 features 128-bit SIMD (single instruction, multiple data), and Imagination says the chip is 30% smaller than comparable CPU cores. Smaller cores conserve valuable real estate inside smartphones, may consume less battery power, and should cost less to produce since more cores can be cut from a single piece of silicon.
Other key features of the Warrior P-class P5600 include hardware virtualization, advanced security, and support for up to six cores per cluster. Imagination says that extended physical addressing (XPA) allows a 32-bit system to access physical memory up to 1 terabyte (40-bits).
Earlier this year Imagination Technologies bought the business operations of MIPS, one of the original pioneers of the RISC architecture. Now it is launching RISC-based CPU cores meant to compete with those licensed by ARM. Right now, ARM-based architectures are the intellectual property used to create most mobile processors, including those made by Qualcomm, Nvidia and Apple.
“As the first new MIPS core introduced since the acquisition of MIPS Technologies, the MIPS P5600 shows that Imagination Technologies is pushing the historic MIPS architecture forward,” said Tom R. Halfhill, senior analyst at The Linley Group.
Broadcom and Cavium have already announced MIPS-based chips, but MIPS and Imagination have a long way to go to catch up with ARM in the smartphone race. This may be less true in the emerging markets for other connected devices, including cars, home electronics and industrial equipment.
The next step for Imagination Technologies will be a 64-bit CPU core, which the company says is coming soon. Imagination says the MIPS architecture offers “seamless” migration from 32-bit to 64-bit solutions. It says its Warrior portfolio will expand over the next year to include a “compelling portfolio of 64-bit and 32-bit variants.”
